This document discusses the challenge of making accurate measurements close to the noise floor. 本文探讨了如何在本底噪声附近精确测量的挑战。
Mil spec PC board well implemented components location & lanes makes this design having the lowest noise floor ever built. 军用规格的PC板很好的实现组件的位置和通道,使这种设计具有最低的本底噪声有史以来建造。
This paper adopts the spectrum averaging method to analyze the effects of clock jitter and the additive white noise to the noise floor of ADC blocks, and derives the noise floor formula, which is validated by computer simulation. 采用频谱平均法分析时钟抖动和加性白噪声对ADC(A/D转换器)模块噪声基底的影响,推导出噪声基底的数学公式,并通过仿真验证了其正确性。
Secondly, we use bispectrum to analyze the dynamic offset error of high speed ADC, point that the bispectrum method can greatly reduce the effect of the noise floor on the offset error testing, and improve the testing sensitivity and accuracy. 提出了利用双谱分析高速ADC动态偏置误差的方法。同时,指出双谱方法可以明显地减小ADC噪声本底对微小偏置误差测量的影响,提高测量的灵敏度和精度。
Then we focus on the channel estimation, including the channel delay estimation by the auto-correlation of the training sequence, the adaptive channel order estimation by noise floor method and the channel impulse estimation by LS method. 然后给出信道参数估计的原理和方法,具体介绍了用训练序列的自相关特性进行信道延时估计、用噪声门限的方法进行信道阶数自适应估计和用最小二乘法进行信道冲击响应的估计。