The paper researchs and analyzes the hardware formal verification, then the verilog code of the novel GALS asynchronous wrapper is modified so that the new design can be verified by model checking tools VIS. 论文分析和研究了形式化验证方法,对所设计的新的GALS异步封装电路的verilog源代码进行了修改,最后在验证工具VIS上完成了对本设计的模型检测验证。