The system-level verification model based on FPGA is designed as the platform to design the transaction-based verification method and process verifying UTOPIA interface. 设计了基于FPGA的系统级验证模型,并在该平台上设计了基于事务的验证(TBV)UTOPIA接口的方法和流程。
After the IC verification technology is discussed in detail in the thesis, the study of SOC verification technologies and methodologies are highlighted, which include the cutting edge transaction-based verification technology, software / hardware co-simulation, hardware accelerated verification technology. 本文在对IC设计的验证技术进行充分的讨论后,着重研究了面向系统芯片的验证技术和方法学,包括业界领先的基于事务的验证(TBV)技术、软硬件协同仿真技术、软硬件协同验证技术。