Then it introduces application of mixed signal / system design language Verilog-AMS for Top-Down design. 接着介绍了应用混合信号/系统设计语言(SDL)Verilog-AMS进行Top-Down设计的思想。
Digital System Design Describing Language 数字系统设计描述语言
Resource Models and Hardware Synthesis for System Level Design Language 资源模型与系统级描述语言的硬件综合
There are three demands in designing a virtual component, include : first, we should describe the virtual component with system level design language. 虚部件设计有三方面的需求:第一、采用系统级设计语言进行功能描述。
UML, which means unified modeling language, is a kind of modeling language, and we always use UML as system analysis and design language. Now, UML has become the main technology in object-oriented system analysis and design. UML即UnifiedMOdelingLanguage是用于进行系统分析设计的模型语言,目前已经成为面向对象分析与设计的主流技术。