This MCU is described by using Verilog hardware design language and designed in the way from top to down. Many crossed architecture programs are used to test the source programs of the improving MCU. 本设计中采用硬件描述语言Verilog及自顶而下(Top-Down)的设计方法设计了改进型微控制器,通过搭建验证平台,采用交叉的验证方案对该MCU进行了验证。
Meanwhile, it also introduces the design platform-ISE 4 of Xilinx Company and the VHDL-a sort of hardware design describe language. 同时还介绍了用来实现这些模块的硬件描述语言&VHDL和Xilinx公司的ISE4开发平台。
This experiment system combines computer technique with teaching experiment of communication, involves hardware circuit design, high level language programming and computer communications. 该实验系统将计算机技术与通信教学实验有机结合,涉及硬件电路设计、高级语言程序设计和计算机通信等。
The main research scope of this thesis, concerns of hardware circuit design, MCU assembly language, driver programming technologies, etc. 本论文研究主要涉及硬件电路设计,单片机汇编语言,驱动程序设计等技术。
Resource Models and Hardware Synthesis for System Level Design Language 资源模型与系统级描述语言的硬件综合