Optimization of Hardware Overhead in Continuous Checksum-Based Analog Error Detection Circuit 基于连续校验和的模拟检错电路硬件开销的优化
Through analyzing the parameters influencing the capacitive detection and noise performance of the circuit, selecting suitable circuit structure and analog electronic elements, a capacitive detection circuit with good performance was achieved. 通过研究影响电容检测电路的因素,选择合适的电路结构以及噪声性能好的模拟电子器件,实现性能优良的电容检测电路。
The harmonic current detection module is composed of analog signal conditioning circuits, AD sampling circuit, zero-crossing detection circuit and PLL circuit. 搭建了针对ip-iq算法的谐波电流硬件检测模块。此模块主要是由DSP外围电路、模拟信号调理电路、AD采样电路、过零检测电路及锁相倍频电路等五部分组成。