The pre-functional cell of standard buffered FET logic ( BFL ) adopted by the gate array possesses nine logic functions, two different kinds of driving capabilities, and the level control ability. 此门阵列采用的BFL预功能级标准逻辑单元,具有九种组合逻辑功能及两种不同选择的驱动能力,并具有输出电平调节功能。
In hardware circuit, the speed of data processing are improved with DSP, Field programmable gate array ( FPGA ) control logic of periphery circuit. In software system, we analyze the principle of subpixel subdivision and establish the mathematic model. 在硬件电路中,采用DSP嵌入式开发系统,提高数据的处理速度,使用可编程逻辑器件FPGA实现对外围接口电路的逻辑控制。
Hardware implementation of lifting wavelet transform is investigated. According to the characteristic of field programmable gate array's ( FPGA ) fast logic handing ability, the architecture of image de-noising suitable for FPGA implementation designed in pipelined adder and barrel shifter is presented. 研究了提升小波的硬件实现方法,根据FPGA器件具有快速逻辑处理能力的特点,采用流水线的加法及桶状移位操作指令,设计了一种适合FPGA实现的提升小波图像去噪的硬件结构。
Technology on configurable system-on-chip FPGA ( Field Programmable Gate Array ) is a kind of programmable logic device. 可配置片上系统技术FPGA属于可编程逻辑器件,芯片内部以阵列状排列各种可配置逻辑模块。
The FPGA ( Field Programmable Gate Array ) is a new large-scale integrated logic IC. 现场可编程门阵列(FPGA&FieldProgrammableGateArray)是新型的大规模集成逻辑器件。